A well-funded chip startup, Soft Machines, is taking the popular but abstract concept of virtual machines and applying it to the chip level.
Soft Machines is debuting what it calls a Virtual Instruction Set Computing (VISC) architecture at the Linley Processor Conference on Thursday, as well as testing working silicon. A spokesman for the company said that Soft Machines would sell its own cores and system-on-a-chip solutions, as well as license the cores to other companies as well.
Soft Machines is noteworthy for who is backing it as well as the technology itself. Angel investors included fabless pioneer Gordon Campbell, former Intel senior vice president Albert Yu, as well as AMD, Samsung's venture arm, GlobalFoundries, and the Mubadala investment group that backed AMD.
Why this matters: It's unclear what Soft Machines intends to do with the chip itself — fundamental chip technology of this sort tends to fizzle out and disappear if not designed into chips from AMD, ARM, Intel, Qualcomm, or the other major chip vendors. It's certainly possible that Soft Machines technology could eventually compete in the smartphone space as an outside competitor — but lacking radio technology, it's facing a steep uphill battle.
Three likely scenarios present themselves: assuming it's viable, Soft Machines disappears for a year or two, while Soft Machines builds or acquires the peripheral logic and/or tools necessary to push this forward; if it's seen as a threat, a company like Intel fast-tracks a competing technology; or finally, the company is acquired. Given that AMD's has already tried this before — the acquisition of NexGen propelled AMD back into the chip race with 1997's K6 chip — the latter scenario doesn't seem too far-fetched.
How it all works
In servers and PCs, virtual machines are "PCs" that can run separately inside a server or other computing device, with the operating system and/or user allocating a portion of the available hardware resources for its own use. The VISC architecture does the same, except that it can take more than one dedicated CPU core and use it to process a single task.
That's a break from traditional programming, which has traditionally taken a single chip — and later, a single core — and fed it a serial "thread" of instructions, as quickly and as simply as possible. With the addition of multiple cores and chips, those instructions have been issued in parallel, with the hope that the instruction tasks would be completed at about the same time. As compilers and other programming techniques improve, those instructions will be more equally divided over the available cores. But unoptimized code tends to focus on a single core. VISC would automatically diffuse that load onto other cores.
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