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TAEC announces 24nm NAND flash chip

Lucas Mearian, Computerworld | April 6, 2011
Toshiba America Electronic Components (TAEC) today announced that it is producing a new NAND flash memory chip based on 24 nanometer (nm) circuitry. It also dedicated a special controller on the chip for error correction code (ECC), offloading that function from host systems.

Toshiba America Electronic Components (TAEC) today announced that it is producing a new NAND flash memory chip based on 24 nanometer (nm) circuitry. It also dedicated a special controller on the chip for error correction code (ECC), offloading that function from host systems.

TAEC's new SmartNAND series, its next-generation NAND flash memory product, is available in densities ranging from 4GB to 64GB.

The new series is expressly designed to remove the burden of ECC from the host processor while minimizing protocol changes.

TAEC's new SmartNAND flash chips are targeted for sale to manufacturers of portable media players, tablet PCs, digital TVs and set-top boxes.

"By enabling the system designer to directly manage the NAND using a standard or custom host NAND controller, while leaving the function of error correction within the NAND package, SmartNAND results in faster time to market ... compared to conventional NAND flash implementations with external ECC," said Scott Nelson, vice president of TAEC's Memory Business Unit, in a statement.

The new SmartNAND 24nm product lineup is a replacement for TAEC's 32nm-generation devices.

Samples of the new SmartNAND chips will be available in mid-April, and mass production will begin in June.

 

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