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Stanford 'high-rise' chip takes on IoT and big data

Sharon Gaudin | Dec. 17, 2014
Using nanotechnology, the new chips are built with layers of processing on top of layers of memory, greatly cutting down on the time and energy typically needed to move information from memory to processing and back.

Shulaker said they've built four-layer chips but could build many more layers. Now they're trying to figure out what size structure gives the most benefit for the cost of the build.

He also said the chips could be built in a traditional chip fabrication plant without too much retooling.

Shulaker declined to say what kind of interest the researchers are receiving from commercial computer chip manufacturers but did say they are collaborating with industry.

 

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