A*STAR Institute of Microelectronics and 11 other semiconductor companies have today announced that they are joining forces to form the 12th Electronics Packaging Research Consortium (EPRC12).
EPRC12 aims to address package design, materials and process integration materials challenges for improved packaging solutions of compact sized consumer electronics and high power electronics.
Currently, the consortium will focus on developing advanced technologies for:
- Copper (Cu) pillar interconnect. By addressing the thermo-mechanical issue of the interconnect structure, the structural integrity for fine pitch interconnection in apps such as processors for consumer electronics can be improved.
- Embedded wafer level packaging (EMWLP) for 3D integrated devices. This project will see the development of solutions to improve the electrical performance for Package-on-Package (PoP) app with medium to high through-mold interconnections.
- High power electronics packaging solutions. This project aims to develop a packaging solution for power module with junction temperature up to 220°C for wide bandgap apps in aerospace, green and renewable energy, and future automotives such as electric vehicles.
The 11 members in EPRC12 span the semiconductor supply chain of the industry from integrated device manufacturers, foundries, packaging houses, equipment and material companies.
They include Ajinomoto, EV Group, GLOBALFOUNDRIES, Heraeus Materials, Henkel, Infineon Technologies, JSR Micro N.V., Linxens, Tokyo Ohka Kogyo, Academy of Public Security Technology (Hefei) and one other packaging company.
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